1. Field of the Invention
This invention relates to a cross-polarization interference canceller for use in a digital radio communications receiver which is supplied with dual, independent input signals.
2. Description of the Prior Art
The crowding of the frequency spectrum in a radio communications system has led to an extremely limited availability of transmission channels. A known approach to solving this problem is the use of the two orthogonally polarized waves for doubling the capacity of the radio communications system.
Under normal circumstances cross-polarization effects, i.e. the effects of interference between such orthogonally polarized signals, are sufficiently low to result in overall good performance. However, when poor propagation conditions exist, such as during heavy rain, or when the signals travel through a multipath communication medium, the cross-polarization interference effects tend to increase and the two signals are not easily isolated merely on the basis of polarization. In order to reduce or cancel the cross-polarization interference, various cancellers have been proposed.
The canceller, in general, does not operate properly in the event that a demodulator generates abnormal outputs due to carrier-wave async caused by fading (for example). Further, when a proper transmission path is re-established due to extinction of fading, the canceller does not quickly regains to its normal operation. Viz., the convergence process of the canceller is delayed.
A known approach to solving these difficultes is that when poor signal reception is detected, the cross-polarization interference canceller is reset using a carrier-wave async signal obtained from a demodulator(s).
Before discussing the present invention in detail, reference will be made to FIGS. 1 and 2. FIG. 1 is a block diagram showing a known resettable canceller together with associated circuiry, which generally comprises dual, independent input terminals 10 and 12 for respectively receiving horizontally and vertically polarized IF (Intermediate Frequency) signals IFh and IFv, two resettable variable couplers 14 and 16, two subtracters 18 and 20, two demodulators 22 and 24, two control signal generators 26 and 28, an OR gate 30, two output terminals 33 and 35, all of which are coupled as shown. Each variable coupler (14 or 16) is of a transversal filter type as shown in FIG. 2.
The control signal generator 26 includes a correlator 32 and an integrator 34, while the other control signal generator 28 similarly includes a correlator 36 and an integrator 38. The independent signals IFh and IFv are respectively applied to the input terminals 10, 12 from separate receiving sections (not shown).
It should be noted that the canceller generally includes the two symmetrical sections arranged for removing contaminating components from the two incoming IF signals, and hence only one symmetrical section will be referred in detail throughout this specification.
As shown in FIG. 1, the signal IFh is fed to the variable coupler 14 and also to the subtracter 18. The subtracter 18 subtracts the output of the variable coupler 16 from the signal IFh in order to reduce or cancel the components of the other signal IFv deteriorating IFh. Following this the subtracter 18 applies the output thereof to the demodulator 22, which produces a digital data signal D1, an error signal E1, a carrier-wave async signal AS1, and a clock signal CK1 reproduced from the recieved IF signal. Similarly, the demodulator 24 produces a digital data signal D2, an error signal E2, a carrier-wave async signal AS2, and a clock signal CK2. The error and data signals E1, D2 are correlated, using the clock signal Ck1, at the correlator 32 which applies a correction signal 40 to the integrator 34. The integrator 34 outputs a control signal 42 which is used to control the variable coupler 16. In a similar manner, the error and data signals E2, D1 are correlated, using the clock signal CK2, at the correlator 36 which applies a correction signal 44 to the integrator 38. The integrator 38 produces a control signal 46 by which the variable coupler 14 is controlled.
FIG. 2 is a block diagram showing a known transversal filter used as the variable coupler 14 (or 16). The transversal filter is a three-tap type for purposes of simplicity. It should be noted that the same device can be utilized in each of the preferred embodiments of this invention.
The FIG. 2 block diagram, which is assumed to be the variable coupler 14 in this instance, comprises an input terminal 50 to which the incoming signal IFh (FIG. 1) is applied, two delay circuits 52 and 54, six tap weighting circuits 56a through 56f, two summing circuits 58 and 60, a 90.degree.-directional coupler 62 whose output is coupled to the subtracter 20 (FIG. 1), and a controller 64. This controller 64 is supplied with the control signal 46 from the integrator 38, and outputs tap coefficient control signals I.sub.-1, R.sub.-1, I.sub.0, R.sub.0, I.sub.+1 and R.sub.+1 which are respectively applied to the tap weighting circuits 56a-56f. The controller 64 also receives the output of the OR gate 30 and is reset in response thereto. The operation of the transversal filter shown in FIG. 2 is well known in the art and hence the details thereof will be omitted for brevity.
Turning back to FIG. 1, in the event that the incoming signal IFh lowers in level due to fading (for example) to an extent that the corresponding demodulator 22 is unable to reproduce a carrier-wave, then the demodulator 22 outputs the carrier-wave async signal AS1 which is applied, via the OR gate 30, to the controller 64 (FIG. 2). The controller 64 is responsive to the signal AS1 resetting the tap weighting circuits 56a-56f by allowing each circuit to produce its output with a minimum value. It is clear that when one of the async signals AS1 and AS2 is outputted, both of the variable couplers 14 and 16 are reset.
The above-mentioned prior art, however, has encountered a drawback in that if (a) the incoming signal IFh is lowered and (b) a cross-polarization interference is sufficiently high to an extent that the level of the signal IFh is below that of the cross-interfering signal IFv at the input of the demodulator 22, then the demodulator 22 demodulates the signal IFv instead of IFh. Consequently, the demodulator 22 does not output the async signal AS1 in that it normally operates as a demodulator itself. This means that the variable couplers 14 and 16 can not be reset, which leads to the situation wherein the canceller of the FIG. 1 arrangement does not function. Further, the FIG. 1 prior art has encountered a further problem in that when the transmission path is restored to its normal condition, it does not provide a fast convergence process for cancelling the interference.
Reference has been made concentrating on the case where the signal IFh is lowered and cross-interfered by IFv, but same discussion is applicable to the reverse case, i.e., the signal IFv is lowered due to fading and cross-polarized by IFh.
Another prior art, disclosed in Japanese laid open patent application (or Patent Application First Provisional Publication) No. 59-77734, has proposed a method of cancelling the cross-polarization interference. In accordance with this method, if the demodulator provided for an interfering transmission path is unable to reproduce the carrier-wave, the canceller is reset in response to the carrier-wave async signal obtained from the demodulator in question. This prior art further discloses another method, in which the data reproduced at the demodulator of the interfering transmission path is checked in connection with a bit error rate. If the bit error rate exceeds a predetermined value, the canceller is reset. This prior art, however, has encountered difficulties. First, in the case where the canceller is reset in response to the carrier-wave async signal, the normally operated demodulator of the interferred tansmission path tends to be forced into the carrier-wave async state due to the cross-interference before resetting the canceller. On the other hand, where the bit error rate is employed, the canceller is reset and maintained at this state irrespective of the fact that the interfering side demodulator is still able to operate normally.